`dac.h`¶

Digital to Analog Conversion (DAC) support.

Contents

Types
Devices
Functions
Register Map Base Pointers
Register Bit Definitions

Types ¶

struct dac_dev

DAC device type.

Public Members

dac_reg_map * regs

Register map.

struct dac_reg_map

DAC register map.

Public Members

__io uint32 CR

Control register.

__io uint32 SWTRIGR

Software trigger register.

__io uint32 DHR12R1

Channel 1 12-bit right-aligned data holding register.

__io uint32 DHR12L1

Channel 1 12-bit left-aligned data holding register.

__io uint32 DHR8R1

Channel 1 8-bit left-aligned data holding register.

__io uint32 DHR12R2

Channel 2 12-bit right-aligned data holding register.

__io uint32 DHR12L2

Channel 2 12-bit left-aligned data holding register.

__io uint32 DHR8R2

Channel 2 8-bit left-aligned data holding register.

__io uint32 DHR12RD

Dual DAC 12-bit right-aligned data holding register.

__io uint32 DHR12LD

Dual DAC 12-bit left-aligned data holding register.

__io uint32 DHR8RD

Dual DAC 8-bit right-aligned data holding register.

__io uint32 DOR1

Channel 1 data output register.

__io uint32 DOR2

Channel 2 data output register.

Devices ¶

const dac_dev * DAC

DAC device.

Functions ¶

void dac_init(const dac_dev * dev, uint32 flags)

Initialize the digital to analog converter.

Parameters:

dev -
DAC device
flags -
Flags: DAC_CH1: Enable channel 1 DAC_CH2: Enable channel 2

Side Effects::

May set PA4 or PA5 to INPUT_ANALOG

void dac_write_channel(const dac_dev * dev, uint8 channel, uint16 val)

Write a 12-bit value to the DAC to output.

Parameters:	`dev` - DAC device `channel` - channel to select (1 or 2) `val` - value to write

void dac_enable_channel(const dac_dev * dev, uint8 channel)

Enable a DAC channel.

Parameters:

dev -
DAC device
channel -
channel to enable, either 1 or 2

Side Effects::

May change pin mode of PA4 or PA5

void dac_disable_channel(const dac_dev * dev, uint8 channel)

Disable a DAC channel.

Parameters:	`dev` - DAC device `channel` - channel to disable, either 1 or 2

Register Map Base Pointers ¶

DAC_BASE

DAC register map base address.

Register Bit Definitions ¶

Control register ¶

Channel 1:

DAC_CR_EN1

DAC_CR_BOFF1

DAC_CR_TEN1

DAC_CR_TSEL1

DAC_CR_WAVE1

DAC_CR_MAMP1

DAC_CR_DMAEN1

Channel 2:

DAC_CR_EN2

DAC_CR_BOFF2

DAC_CR_TEN2

DAC_CR_TSEL2

DAC_CR_WAVE2

DAC_CR_MAMP2

DAC_CR_DMAEN2

Software trigger register ¶

DAC_SWTRIGR_SWTRIG1

DAC_SWTRIGR_SWTRIG2

Channel 1 12-bit right-aligned data holding register ¶

DAC_DHR12R1_DACC1DHR

Channel 1 12-bit left-aligned data holding register ¶

DAC_DHR12L1_DACC1DHR

Channel 1 8-bit left-aligned data holding register ¶

DAC_DHR8R1_DACC1DHR

Channel 2 12-bit right-aligned data holding register ¶

DAC_DHR12R2_DACC2DHR

Channel 2 12-bit left-aligned data holding register ¶

DAC_DHR12L2_DACC2DHR

Channel 2 8-bit left-aligned data holding register ¶

DAC_DHR8R2_DACC2DHR

Dual DAC 12-bit right-aligned data holding register ¶

DAC_DHR12RD_DACC1DHR

DAC_DHR12RD_DACC2DHR

Dual DAC 12-bit left-aligned data holding register ¶

DAC_DHR12LD_DACC1DHR

DAC_DHR12LD_DACC2DHR

Dual DAC 8-bit left-aligned data holding register ¶

DAC_DHR8RD_DACC1DHR

DAC_DHR8RD_DACC2DHR

Channel 1 data output register ¶

DAC_DOR1_DACC1DOR

Channel 1 data output register ¶

DAC_DOR2_DACC2DOR

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