This page is a general resource for information specific to the Maple Native Beta. Since this is a beta release, the information here may change slightly between now and the final Maple Native release.
The power source is determined by the header labeled “PWRSEL” on the silkscreen. The Maple Native may be powered from USB (marked “USB” on the PWRSEL header), a LiPo battery (marked “BAT”), or one of the two “Vin” pins (marked “EXT”). Boards are shipped with a jumper on the USB selector. In order to power it off of an alternative source, unplug the Maple Native, then move the jumper to the desired selector before reconnecting power.
The “Vin” line is available on the pin labeled “Vin” on the vertical header to the right of the PWRSEL header, as well as on the unpopulated two-pin connector on the upper left corner of the board. On this latter connector, polarity was accidentally left unmarked: the leftmost, round pin should be power, while the square pin should be ground.
When powering the Maple Native board from a battery or the Vin lines, care must be taken not to over-voltage the board. In general, an upper limit of 12V input is acceptable, but this may vary depending upon the current draw requirements of the application. Please see Power Regulation on the Maple Native for more information.
Power regulation on the Maple Native is provided by two low dropout linear voltage regulators. (The part is the MCP1703 from Microchip, in the SOT-23A package. You can download the datasheet here). One of the regulators supplies power to the digital voltage plane; the other supplies power to the analog voltage plane.
These voltage regulators nominally take an input of up to 16V. In addition, while the maximum continuous output current for the board is 250mA, if you are powering the board off higher voltages the amount off current it can supply goes down, due to the regulators needing to dissipate the extra power. So if you are powering the board off 12V, the max current is about 40mA at room temperature. In general (again, at room temperature) the max power dissipation (PD) for the chip is about .37W, and output current = PD/(Vin-Vout). For exact max current calculations, please refer to the datasheet linked above.
If you are planning to draw a lot of current from the Maple Native board, it is necessary to provide input power as close to 3.3V as possible. Powering the microcontroller circuitry and LEDs on the board alone takes approximately 30mA, so if you are powering the board with 12V that leaves only 10mA (at best) available for powering any user circuitry. Attempting to draw more than 10mA runs the risk of shorting out the power regulators and bricking your board.
Maple Native includes a built-in LiPo battery charger. In order to use it, put a jumper across the CHRG selector on the PWRSEL header and across the USB, or EXT selectors, depending on whether you’re charging the battery via USB cable or Vin, respectively. The LED labeled CHRG will light up while the battery is being charged. When the battery is finished charging, the LED labeled DONE will light up.
The Maple Native features 106 total input/output pins, numbered D0 through D105. In most cases, these numbers correspond to the numeric values next to each header on the Maple Native’s silkscreen. However, pins D101 through D105 are broken out to the JTAG header, and are not numbered on the silkscreen. In addition, some other pins have other uses by default .
Many of the pins on the right header (pins D56 through D100, the header is labeled “FSMC” on the silkscreen) are connected to the SRAM chip. Using these pins as GPIOs may render the memory chip useless, which can cause your program to crash. For this reason, we don’t recommend that you use these pins unless you know what you are doing. The following pins on the right header are not connected to the SRAM and may be used with impunity: D57, D60, D63, D66, D69, D72, D75, D80, D83.
Pins D101 through D105 are connected to the pads on the JTAG header. In order to use them as GPIOs, you must first disable the Maple Native’s debug ports. You can do this by calling disableDebugPorts(). (Note that this means you won’t be able to use JTAG or SW-Debug to debug your program).
This table shows a summary the available functionality on every GPIO pin, by peripheral type. The “5 V?” column documents whether or not the pin is 5 volt tolerant.
Note that this table is not exhaustive; on some pins, more peripherals are available than are listed here.
D48, D49, D50, D51 are also connected to Timer 2 channels 1, 2, 3, and 4, respectively.
Right (FSMC) header
All of the following pins are 5V-tolerant. Note that in the “FSMC” column below, entries with a “Dn” value (D0, D1, etc.) don’t refer to pins; they refer to FSMC data lines. See RM0008 for more information.
Many of the pins on this header are used by the Maple Native’s SRAM chip. Don’t use them as GPIOs unless you know what you’re doing, or your program may crash. See above for more information.
JTAG header pins
See above for more information on these pins.
The following tables show what pins are associated with each GPIO port.
|PA0: D48||PB0: D47||PC0: D7||PD0: D64|
|PA1: D49||PB1: D46||PC1: D8||PD1: D67|
|PA2: D50||PB2: -||PC2: D9||PD2: D27|
|PA3: D51||PB3: D104||PC3: D10||PD3: D28|
|PA4: D52||PB4: D105||PC4: D11||PD4: D89|
|PA5: D53||PB5: D37||PC5: D12||PD5: D86|
|PA6: D54||PB6: D38||PC6: D13||PD6: D29|
|PA7: D55||PB7: D39||PC7: D14||PD7: -|
|PA8: D23||PB8: -||PC8: D15||PD8: D96|
|PA9: D24||PB9: D26||PC9: D16||PD9: D98|
|PA10: D25||PB10: D0||PC10: D17||PD10: D100|
|PA11: -||PB11: D1||PC11: D18||PD11: D57|
|PA12: -||PB12: D2||PC12: D19||PD12: D60|
|PA13: D101||PB13: D3||PC13: D20||PD13: D63|
|PA14: D102||PB14: D4||PC14: D21||PD14: D58|
|PE0: D95||PF0: D56||PG0: D85|
|PE1: D92||PF1: D59||PG1: D88|
|PE2: - PF2: D62||PG2: D91|
|PE3: D66||PF3: D65||PG3: D94|
|PE4: D69||PF4: D68||PG4: D97|
|PE5: D72||PF5: D71||PG5: D99|
|PE6: D75||PF6: D41||PG6: D36|
|PE7: D70||PF7: D42||PG7: D35|
|PE8: D73||PF8: D43||PG8: D34|
|PE9: D76||PF9: D44||PG9: D80|
|PE10: D78||PF10: D45||PG10: D83|
|PE11: D81||PF11: D40||PG11: D30|
|PE12: D84||PF12: D74||PG12: D31|
|PE13: D87||PF13: D77||PG13: D32|
|PE14: D90||PF14: D79||PG14: D33|
The following table shows what pins are associated with a particular timer’s capture/compare channels.
There is no mistake between timers 2 and 5. They really do share those pins. If you like, you can remap some of the timer 2 channels to get extra PWM pins; see afio_remap() (in gpio.h).
|Timer||Ch. 1||Ch. 2||Ch. 3||Ch. 4|
The following table shows which pins connect to which EXTI lines.
|EXTI0||D7, D47, D48, D56, D64, D85, D95|
|EXTI1||D8, D46, D49, D59, D67, D88, D92|
|EXTI2||D9, D27, D50, D62, D91|
|EXTI3||D10, D28, D51, D65, D66, D94, D104|
|EXTI4||D11, D52, D68, D69, D89, D97, D105|
|EXTI5||D12, D37, D53, D71, D72, D86, D99|
|EXTI6||D13, D29, D36, D38, D41, D54, D75|
|EXTI7||D14, D35, D39, D42, D55, D70|
|EXTI8||D15, D23, D34, D43, D73, D96|
|EXTI9||D16, D24, D26, D44, D76, D80, D98|
|EXTI10||D0, D17, D25, D45, D78, D83, D100|
|EXTI11||D1, D18, D30, D40, D57, D81|
|EXTI12||D2, D19, D31, D60, D74, D84|
|EXTI13||D3, D20, D32, D63, D77, D87, D101|
|EXTI14||D4, D21, D33, D58, D79, D90, D102|
|EXTI15||D5, D6, D22, D61, D82, D93, D103|
The Maple Native has 3 USART serial ports. They communicate using the pins given in the following table.
The Maple Native also has 2 UART serial ports. Unlike USARTS, these only communicate asynchronously, and thus only have TX and RX pins. These are given in the following table.
There are fifteen pins at the bottom right of the board (D41 — D55) that generally offer lower-noise ADC performance than other pins on the board. If you’re concerned about getting good ADC readings, we recommend using one of these pins to take your measurements.
Maple Native has an electrically isolated analog power plane with its own regulator, and a geometrically isolated ground plane. Analog input pins D41 — D55 are laid out to correspond with these analog planes, and our measurements indicate that they generally ofer low noise ADC performance. However, analog performance may vary depending upon the activity of other GPIOs. In particular, using PWM on any of pins D46 — D51, D54, and D55 may cause digital noise. Consult the Maple Native beta hardware design files for more details.
This section lists the Maple Native’s board-specific values.
boardPWMPins: 13, 14, 15, 16, 23, 24, 25, 26, 38, 39, 46, 47, 48, 49, 50, 51, 54, 55
boardADCPins: 7, 8, 9, 10, 11, 12, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55
BOARD_JTMS_SWDIO_PIN, BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN, and all pins on FSMC header except those mentioned above.
BOARD_SPI3_NSS_PIN: 103 (on JTAG header)
BOARD_SPI3_MISO_PIN: 105 (JTAG header)
BOARD_SPI3_SCK_PIN: 104 (JTAG header)
If you’re familiar with Git, you can clone the entire repository and checkout the commit tagged “beta” using the following:
$ git clone git://github.com/leaflabs/maplenative.git $ git checkout beta
The following known failure modes apply to the Maple Native Beta. The failure modes aren’t design errors, but are easy ways to break or damage your board permanently.
Reversing Vin and GND: when powering the Maple Native Beta via the Vin and ground (GND) pins at the top left of the board, it is possible to carelessly cause a short or switch the connections, applying the high voltage to GND and ground to Vin.
If this happens, you will reverse bias the diode beneath these pins, most likely damaging it. This may cause excess voltage to subsequently be delivered to the board once the reversed pins are connected properly.
This section lists known issues and warnings for the Maple Native Beta.
STMicro documentation for STM32F103ZE microcontroller:
|||See boardUsedPins for more information.|